PCB Errata

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  1. Ordered the wrong part for the 3.3V LDO supply - will order a suitable replacement from Farnell.
  2. U8 (analog switch) should be powered from 3V3LDO and not 3V3 (switcher).
  3. AVR Programmer should be powered from 3V3LDO and not 3V3 (switcher).
  4. Debug breakout board clearances are all wrong.... (box headers come out over the edge of the board, not enough room for the buttons).
  5. Foot print for debug breakout board connector is slightly wrong (but works anyway, at least for hand soldering).
  6. 68 ohm resistors for ethernet LEDs have no supplier specified in the schematic.
  7. U10 (MAX3232) V- pin connected directly to ground (Not through cap as it should be)
  8. The schematic symbol for U22 and U24 (The AD7790) was incorrectly numbered....
  9. The EXP3 female connector footprint is wrong. The area between the pins should be keep-out layer because the male connector can pass through and contact the board beneath. We have two vias which may be shorted out if this happens.
  10. FPGA IO Pin J4 is not a IO pin, it is a dedicated clock; we used it for MOSI for the Gyro ADC. Move to IO1_C02 on SNAP1.
  11. The radio reset and Data/mCmd pins should have been bout to the supervisor, snapper, or both
  12. TX and RX round the wrong way on the radio on board, thanks to a confusing datasheer of the AC4486
  13. R77 Should have been placed to give 57.6K UBX data, it was marked as DNP on the schematic
  14. Forgot pull-ups on the MMC interface
[edit]

Fixed on the Prototype

  1. Order part #3605700 (no enable input) or part #3605840 (with enable input) from Farnell
  2. Not Yet
  3. with wire, using one of the spare pins on the debug connector.
  4. N/A - Will respin at uni
  5. N/A - Will respin at uni
  6. N/A
  7. Lifted U10 pin 6 and connected to DGND through a through hole capacitor. Replaced C37 with a 0ohm resistor.
  8. Not Yet
  9. We must ensure that the USB/MMC daughtercard is spaced off the board such that it can not do this.
  10. We added a wire link between I01_D04 and IO1_J04 (becuase it was easier), NOT I01_C02 as noted above.
  11. N/A - Not Critical
  12. Not Yet
  13. Added 0ohm resistor to R77
  14. Added as per recommended in the MMC spec
[edit]

Fixed in Protel

  1. Not Yet
  2. Not Yet
  3. Not Yet
  4. Not Yet
  5. Not Yet
  6. Not Yet
  7. Not Yet
  8. Not Yet
  9. Not Yet
  10. Not Yet
  11. Not Yet
  12. Not Yet
  13. Not Yet
  14. Not Yet
[edit]

Changes For the Next Spin

Although we do not have the time, money or motivation to complete another iteration of the design the following is a list of changes that would be made.

  1. Add pulldown resistors to the level translators

Although the FPGA has internal pullup/pulldown resistors, these are not operation until after the device has been programmed (not until about 5-10 seconds after boot)

  1. Connect the radio DnCMD pin to the micro in a wired or fashion.
  2. Simplify the power suppy slightly.

We intially budgeted for higher current consumption than what is occuring (especially on the 5V rails). The 5VLDO_PRESS rail could be eliminated such that all analogue sensors are supplied from the 5VLDO rail. There are also some ghosts in the power supply with not being able to disable the switching regulators when they are not loaded....

  1. Rethink the supervisor<->snapper inteface with respect to keep-alive, and the handover of manual -> automatic control
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